There are many challenges in broadband communications links. In particular, in a communication environment where it is desired to have high aggregate throughput such as at multigigabit speeds, special consideration is required to meet future data rates. At high frequencies, serial links are susceptible to electromagnetic interference as well as strong attenuation and reflections caused by poor electrical interfaces.
Printed circuit boards (PCB) such as FR4 boards are particularly limited at higher frequencies. These boards suffer from attenuation due to skin losses, via stubs, and connectors, severely limiting the signal integrity. To combat high-frequency attenuation, amplitude equalization is introduced in the transmitter (pre-emphasis) or receiver (post-emphasis). Equalizer implementation is straightforward at the receiver, but high-frequency attenuation requires amplification of the signal and, therefore, the noise, limiting the signal-to-noise ratio (SNR).
Pre-emphasis compensates for high-frequency attenuation prior to the addition of noise over the interconnect. This approach, however, suffers drawbacks in environments where several serial links are situated in close proximity such as on PCBs. In backplanes as well as integrated circuit environments, a premium on space precludes creating completely shielded links. Therefore, as faster data rates are achieved, high-frequency signal components couple more electromagnetic energy into neighboring channels. This coupling manifests as near-end crosstalk (NEXT) and far-end crosstalk (FEXT).
Crosstalk results from the interaction of electromagnetic fields generated by neighboring data signals as they propagate through transmission lines and connectors. For instance, either inductances or capacitances can dominate interconnect crosstalk on PCBs and backplane connectors introduce multi-pin crosstalk. Crosstalk considerations also affect the performance of integrated digital circuits.
In high-speed communication link designs, signal transmission at multigigabit speeds on a FR4 board is a particular challenging problem. With more non-homogeneous mediums (e.g., microstrip, connectors, vias) and longer transmission lines (T-lines) on boards, FEXT cancellation is moving to the forefront in board design considerations.
This problem has been addressed with topology changes in T-lines, receiver equalization, or coding algorithms. For example, J. Cioffi in U.S. Pat. No. 7,593,458, entitled, FEXT Determination System, describes how to determine FEXT. Hasegawa, Ginis, et. al., in U.S. Pat. No. 7,394,752, entitled, Joint Reduction of NEXT and FEXT in xDSL Systems, describe FEXT cancellation work based on the received signal. Jacobsen and Wiese in U.S. Pat. No. 6,205,220, entitled, Method to Mitigate The Near-Far FEXT Problem, describe a method and system for the shaping of T-lines. Chien and Tsao in A Novel Transmitter Side Based Far End Crosstalk Cancellation For A 10 GBASE-T also describe a method and system for FEXT cancellation through coding on the driver side. Gazizov in Far End Crosstalk Reduction in Double-Layered Dielectric Interconnects, describes reducing the FEXT with a coupled interconnect structure. Finally, Mallahzadeh, Ghasmemi, et al., in Crosstalk Reduction Using A Step Shaped Transmission Line proposed using a step-shaped T-line for FEXT reduction. All of the above-identified ways to address this issue are complex and add significant cost and are not readily adaptable to high volume production.
Accordingly what is desired is a method and system that addresses the above identified issues. The method and system should be cost effective, easy to implement and adaptable to existing processes. The present invention addresses such a need.